343 search results - page 11 / 69 » Design methodology for IRA codes |
DAC
2000
ACM
14 years 11 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
CODES
1999
IEEE
14 years 2 months ago
1999
IEEE
With the growth of System on a Chip (SoC), the functionality of analog components must also be considered in the design process. This paper describes some of the design implementa...
CORR
2006
Springer
13 years 10 months ago
2006
Springer
This paper describes an efficient implementation of binning for decode-and-forward (DF) in relay channels using lowdensity parity-check (LDPC) codes. Bilayer LDPC codes are devised...
CODES
2006
IEEE
14 years 4 months ago
2006
IEEE
This paper presents a methodology to combine Transaction Level Modeling and System/Network co-simulation for the design of networked embedded systems. As a result, a new design di...
EUROGP
2001
Springer
14 years 2 months ago
2001
Springer
An evolutionary algorithm is used to design a finite impulse response digital filter with reduced power consumption. The proposed design approach combines genetic optimization an...