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» Design of Asynchronous Circuits Using Synchronous CAD Tools
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ISQED
2007
IEEE
104views Hardware» more  ISQED 2007»
14 years 2 months ago
System Level Estimation of Interconnect Length in the Presence of IP Blocks
With the increasing size and sophistication of circuits and specifically in the presence of IP blocks, new wirelength estimation methods are needed in the design flow of large-sca...
Taraneh Taghavi, Ani Nahapetian, Majid Sarrafzadeh
HICSS
1997
IEEE
109views Biometrics» more  HICSS 1997»
14 years 24 days ago
Performance Evaluation of a C++ Library Based Multithreaded System
One model of multithreading gaining popularity on multiprocessor systems is the message-driven model of computation. The message-driven model is a reactive model in which an arriv...
John G. Holm, Steven Parkes, Prithviraj Banerjee
GLVLSI
2007
IEEE
171views VLSI» more  GLVLSI 2007»
14 years 2 months ago
Combinational equivalence checking for threshold logic circuits
Threshold logic is gaining prominence as an alternative to Boolean logic. The main reason for this trend is the availability of devices that implement these circuits efficiently (...
Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevo...
ARC
2010
Springer
183views Hardware» more  ARC 2010»
13 years 8 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards
NOCS
2008
IEEE
14 years 3 months ago
Network Simplicity for Latency Insensitive Cores
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
Daniel Gebhardt, JunBok You, W. Scott Lee, Kenneth...