125 search results - page 8 / 25 » Design of Asynchronous Circuits Using Synchronous CAD Tools |
ASPDAC
2001
ACM
14 years 7 days ago
2001
ACM
Abstract-- In order to continue to produce circuits of increasing speeds, designers must consider aggressive circuit design styles such as self-resetting or delayed-reset domino ci...
ASYNC
1998
IEEE
14 years 25 days ago
1998
IEEE
Analogue to digital (A-D) converters with a xed conversion time are subject to errors due to metastability. These errors will occur in all converter designs with a bounded time fo...
DFT
2006
IEEE
14 years 7 days ago
2006
IEEE
The concept of clocking for QCA, referred to as the four-phase clocking, is widely used. However, inherited characteristics of QCA, such as the way to hold state, the way to synch...
LICS
1996
IEEE
14 years 22 days ago
1996
IEEE
We present a formal model for concurrent systems. The model represents synchronous and asynchronous components in a uniform framework that supports compositional (assume-guarantee)...
HPCC
2007
Springer
14 years 2 months ago
2007
Springer
Abstract. Low-power design became crucial with the widespread use of the embedded systems, where a small battery has to last for a long period. The embedded processors need to efï¬...