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VLSID
2007
IEEE
133views VLSI» more  VLSID 2007»
14 years 8 months ago
On the Impact of Address Space Assignment on Performance in Systems-on-Chip
Today, VLSI systems for computationally demanding applications are being built as Systems-on-Chip (SoCs) with a distributed memory sub-system which is shared by a large number of ...
G. Hazari, Madhav P. Desai, H. Kasture
HPCA
2009
IEEE
14 years 8 months ago
Accurate microarchitecture-level fault modeling for studying hardware faults
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There is much ongoing research on efficient fault t...
Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu...

Lab
652views
15 years 7 months ago
Electronic Enterprises Laboratory
Our research is motivated by a strong conviction that business processes in electronic enterprises can be designed to deliver high levels of performance through the use of mathemat...
ICCCN
2007
IEEE
14 years 2 months ago
Interleaving Techniques for W-CDMA Linear Equalization Receivers
—This paper focuses on the use of specific interleaving techniques for use in W-CDMA (Wideband Code Division Multiple Access). The linear equalization algorithm usually performs ...
João Carlos Silva, Rui Dinis, Nuno Souto, F...
GLOBECOM
2006
IEEE
14 years 1 months ago
Modelling the Impact of User Mobility on the Throughput in Networks of Wireless 802.11 LANs
— The wireless LAN technology 802.11, also called Wi-Fi, offers high speed wireless Internet access for local area environments. WLANs provide much higher data rates than the mob...
Sandjai Bhulai, Robert D. van der Mei, Taoying Yua...