253 search results - page 36 / 51 » Design of a logic element for implementing an asynchronous F... |
RSP
1998
IEEE
13 years 12 months ago
1998
IEEE
A rapid design methodology for orthonormal wavelet transform cores has been developed. This methodology is based on a generic, scaleable architecture utilising time-interleaved co...
FCCM
2007
IEEE
13 years 9 months ago
2007
IEEE
Creating a high throughput sparse matrix vector multiplication (SpMxV) implementation depends on a balanced system design. In this paper, we introduce the innovative SpMxV Solver ...
ANCS
2006
ACM
14 years 1 months ago
2006
ACM
The increase of the web traffic has created the need for web switches that are able to balance the traffic to the server farms based on their contents (e.g. layer 7 switching). In...
FPGA
1995
ACM
13 years 11 months ago
1995
ACM
During the development of computer peripherals which interface to the processor via the system bus it is often necessary to acquire the signals on the bus at the hardware level. I...
FPL
2010
Springer
13 years 5 months ago
2010
Springer
Abstract--Modular multiplication of long integers is an important building block for cryptographic algorithms. Although several FPGA accelerators have been proposed for large modul...