253 search results - page 41 / 51 » Design of a logic element for implementing an asynchronous F... |
ENTCS
2008
13 years 7 months ago
2008
Towards a unifying model of concurrency, we have designed and implemented LMNtal (pronounced "elemental"), a model and language based on hierarchical graph rewriting tha...
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
Threshold logic is gaining prominence as an alternative to Boolean logic. The main reason for this trend is the availability of devices that implement these circuits efficiently (...
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
Parallel random access memory, or PRAM, is a now venerable model of parallel computation that that still retains its usefulness for the design and analysis of parallel algorithms....
ISQED
2002
IEEE
14 years 17 days ago
2002
IEEE
In this paper, we describe a comprehensive layout methodology for bonded three-dimensional integrated circuits (3D ICs). In bonded 3D integration technology, parts of a circuit ar...