195 search results - page 33 / 39 » Design of clocked circuits using UML |
CDC
2008
IEEE
14 years 1 months ago
2008
IEEE
In this paper we consider Loosely Time-Triggered Architectures (LTTA) as a networked infrastructure for deploying discrete control. LTTA are distributed architectures in which 1/ ...
CF
2005
ACM
13 years 9 months ago
2005
ACM
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
ICCD
2006
IEEE
14 years 3 months ago
2006
IEEE
— New back-end design for manufacturability rules have brought guarantee rules for interconnect matching. These rules indicate a certain capacitance matching guarantee given spac...
LCN
2003
IEEE
14 years 8 days ago
2003
IEEE
Optoelectronic integrated circuits can support thousands of integrated optical laser diodes and photodetectors bonded to a high-performance CMOS substrate, and can be used in the ...
TCAD
2010
13 years 1 months ago
2010
Design debugging is a major bottleneck in modern VLSI design flows as both the design size and the length of the error trace contribute to its inherent complexity. With typical des...