In the paper, we propose a new metric for the minimization of area in the generic problem of multiple constant multiplications, and demonstrate its effectiveness for digital FIR f...
This paper describes a family of high-speed Finite Impulse Response (FIR) digital filters that have been scaled across three generations of CMOS processes. The processes include c...
Lars E. Thon, Ghavam G. Shahidi, Werner Rausch, Ge...
- This paper presents the design and implementation methodology of some low power programmable FIR filtering IP cores targeting SoRC and compares their performance in term of area,...
Muhammad Akhtar Khan, Abdul Hameed, Ahmet T. Erdog...
This paper presents two schemes for the implementation of high performance and low power FIR filtering Intellectual Property (IP) cores. Low power is achieved through the utilizat...