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» Design of low complexity digital FIR filters
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ICIP
2009
IEEE
14 years 9 months ago
Lcd Motion Blur Reduction Using Fir Filter Banks
Due to the sample-and-hold nature of Liquid Crystal Display (LCD) image formation, LCDs suffer from motion picture blur. This is especially evident during scenes containing fast m...
ISCAS
2005
IEEE
119views Hardware» more  ISCAS 2005»
14 years 2 months ago
Multi-plet two-channel perfect reconstruction filter banks
This paper proposes a new class of two-channel structural perfect reconstruction (PR) FIR filter banks (FBs) called the multi-plet FB. It generalizes structural PR FBs proposed by...
S. C. Chan, K. M. Tsui
ISCAS
2007
IEEE
169views Hardware» more  ISCAS 2007»
14 years 2 months ago
A Fractional-N PLL for Digital Clock Generation With an FIR-Embedded Frequency Divider
−In this paper, a novel architecture of a fractional-N phase-locked loop (PLL) is presented for digital clock generation. By employing multimodulus dividers in parallel with sequ...
Baoyong Chi, Xueyi Yu, Woogeun Rhee, Zhihua Wang
ISCAS
1993
IEEE
82views Hardware» more  ISCAS 1993»
14 years 22 days ago
Two-dimensional digital filtering using constant-I/O systolic arrays
We present in this paper systolic arrays with constant number of input/output (I/O) ports for twodimensional (2-D) FIR and IIR filtering. Our design has an array of L × N proces...
Mokhtar Aboelaze, De-Lei Lee, Benjamin W. Wah
EH
2002
IEEE
104views Hardware» more  EH 2002»
14 years 1 months ago
Evolvable Hardware for the Generation of Sequential Filter Circuits
Evolutionary algorithms (EAs) are regularly used both for the solution of scheduling problems, and for the creation of digital circuit designs. This paper describes a unified app...
Robert Thomson, Tughrul Arslan