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CODES
2008
IEEE
16 years 13 days ago
SPaC: a symbolic pareto calculator
The compositional computation of Pareto points in multi-dimensional optimization problems is an important means to efficiently explore the optimization space. This paper presents ...
Hamid Shojaei, Twan Basten, Marc Geilen, Phillip S...
CASES
2006
ACM
15 years 12 months ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
DATE
2008
IEEE
145views Hardware» more  DATE 2008»
16 years 13 days ago
Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
Mohammad Abdullah Al Faruque, Jörg Henkel
BSN
2009
IEEE
118views Sensor Networks» more  BSN 2009»
16 years 24 days ago
Smart Jacket Design for Neonatal Monitoring with Wearable Sensors
— Critically ill new born babies admitted at the Neonatal Intensive Care Unit (NICU) are extremely tiny and vulnerable to external disturbance. Smart Jacket proposed in this pape...
Sibrecht Bouwstra, Wei Chen, Loe M. G. Feijs, Sida...
IEEECIT
2005
IEEE
15 years 11 months ago
A Performance and Power Co-optimization Approach for Modern Processors
In embedded systems, performance and power are important inter-related issues that cannot be decoupled. Expensive and extensive simulations in a processor design space are usually...
Yongxin Zhu, Weng-Fai Wong, Cheng-Kok Koh