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FPL
2004
Springer
103views Hardware» more  FPL 2004»
15 years 11 months ago
Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs
Abstract. Function evaluation is at the core of many compute-intensive applications which perform well on reconfigurable platforms. Yet, in order to implement function evaluation ...
Dong-U Lee, Oskar Mencer, David J. Pearce, Wayne L...
WWW
2004
ACM
16 years 6 months ago
CS AKTive space: representing computer science in the semantic web
We present a Semantic Web application that we call CS AKTive Space1 . The application exploits a wide range of semantically heterogeneous and distributed content relating to Compu...
Monica M. C. Schraefel, Nigel R. Shadbolt, Nichola...
GRAPHICSINTERFACE
2008
15 years 7 months ago
A scalability study of web-native information visualization
Several web-native information visualization methods (SVG, HTML5's Canvas, native HTML) are studied to contrast their performances at different data scales. Using Java implem...
Donald W. Johnson, T. J. Jankun-Kelly
DATE
2002
IEEE
206views Hardware» more  DATE 2002»
15 years 11 months ago
Accurate Area and Delay Estimators for FPGAs
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
Anshuman Nayak, Malay Haldar, Alok N. Choudhary, P...
176
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ASPDAC
2005
ACM
102views Hardware» more  ASPDAC 2005»
15 years 8 months ago
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages
— Architecture Description Languages (ADLs) are widely used to perform design space exploration for Application Specific Instruction Set Processors (ASIPs). While the design spa...
Oliver Schliebusch, Anupam Chattopadhyay, David Ka...