Sciweavers

397 search results - page 36 / 80
» Designing Fast Asynchronous Circuits
Sort
View
TCAD
2008
119views more  TCAD 2008»
13 years 9 months ago
FLUTE: Fast Lookup Table Based Rectilinear Steiner Minimal Tree Algorithm for VLSI Design
Abstract-- In this paper, we present a very fast and accurate rectilinear Steiner minimal tree (RSMT) algorithm called FLUTE. FLUTE is based on pre-computed lookup table to make RS...
Chris C. N. Chu, Yiu-Chung Wong
ISPD
2005
ACM
116views Hardware» more  ISPD 2005»
14 years 3 months ago
A fast algorithm for power grid design
This paper presents an efficient heuristic algorithm to design a power distribution network of a chip by employing a successive partitioning and grid refinement scheme. In an it...
Jaskirat Singh, Sachin S. Sapatnekar
GLVLSI
2006
IEEE
185views VLSI» more  GLVLSI 2006»
14 years 4 months ago
Application of fast SOCP based statistical sizing in the microprocessor design flow
In this paper we have applied statistical sizing in an industrial setting. Efficient implementation of the statistical sizing algorithm is achieved by utilizing a dedicated interi...
Murari Mani, Mahesh Sharma, Michael Orshansky
ICCD
2008
IEEE
160views Hardware» more  ICCD 2008»
14 years 6 months ago
Fast arbiters for on-chip network switches
— The need for efficient implementation of simple crossbar schedulers has increased in the recent years due to the advent of on-chip interconnection networks that require low la...
Giorgos Dimitrakopoulos, Nikos Chrysos, Costas Gal...
DAC
2009
ACM
14 years 1 months ago
Fast vectorless power grid verification using an approximate inverse technique
Power grid verification in modern integrated circuits is an integral part of early system design where adjustments can be most easily incorporated. In this work, we describe an ea...
Nahi H. Abdul Ghani, Farid N. Najm