63 search results - page 6 / 13 » Designing High Bandwidth On-Chip Caches |
ISCA
2012
IEEE
11 years 10 months ago
2012
IEEE
Smartphones represent one of the fastest growing markets, providing significant hardware/software improvements every few months. However, supporting these capabilities reduces the...
SPDP
1993
IEEE
13 years 11 months ago
1993
IEEE
Meerkat is a distributed memory multicomputer architecture that scales to hundreds of processors. Meerkat uses a two dimensional passive backplane to connect nodes composed of pro...
SAMOS
2007
Springer
14 years 1 months ago
2007
Springer
— General purpose architectures are designed to offer average high performance regardless of the particular application that is being run. Performance and power inefficiencies a...
INFOCOM
2003
IEEE
14 years 24 days ago
2003
IEEE
— Satellite operators have recently begun offering Internet access over their networks. Typically, users connect to the network using a modem for uplink, and a satellite dish for...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
Abstract— In this paper, we describe the design and implementation of the primary memory system of the TRIPS processor. To match the aggressive execution bandwidth and support hi...