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DAGSTUHL
2007
13 years 10 months ago
Parallelism through Digital Circuit Design
Abstract. Two ways to exploit chips with a very large number of transistors are multicore processors and programmable logic chips. Some data parallel algorithms can be executed e...
John O'Donnell
ASPLOS
2010
ACM
14 years 1 months ago
An asymmetric distributed shared memory model for heterogeneous parallel systems
Heterogeneous computing combines general purpose CPUs with accelerators to efficiently execute both sequential control-intensive and data-parallel phases of applications. Existin...
Isaac Gelado, Javier Cabezas, Nacho Navarro, John ...
PPOPP
2010
ACM
13 years 10 months ago
Helper locks for fork-join parallel programming
Helper locks allow programs with large parallel critical sections, called parallel regions, to execute more efficiently by enlisting processors that might otherwise be waiting on ...
Kunal Agrawal, Charles E. Leiserson, Jim Sukha
CASES
2009
ACM
14 years 3 months ago
Parallel, hardware-supported interrupt handling in an event-triggered real-time operating system
A common problem in event-triggered real-time systems is caused by low-priority tasks that are implemented as interrupt handlers interrupting and disturbing high-priority tasks th...
Fabian Scheler, Wanja Hofer, Benjamin Oechslein, R...