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» Designing a Coprocessor for Recurrent Computations
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SIGMOD
2004
ACM
166views Database» more  SIGMOD 2004»
14 years 7 months ago
Fast Computation of Database Operations using Graphics Processors
We present new algorithms on commodity graphics processors to perform fast computation of several common database operations. Specifically, we consider operations such as conjunct...
Naga K. Govindaraju, Brandon Lloyd, Wei Wang 0010,...
ICCD
2005
IEEE
246views Hardware» more  ICCD 2005»
14 years 4 months ago
H-SIMD Machine: Configurable Parallel Computing for Matrix Multiplication
FPGAs (Field-Programmable Gate Arrays) are often used as coprocessors to boost the performance of dataintensive applications [1, 2]. However, mapping algorithms onto multimillion-...
Xizhen Xu, Sotirios G. Ziavras
BIBE
2007
IEEE
126views Bioinformatics» more  BIBE 2007»
13 years 9 months ago
FPGA Acceleration of Phylogeny Reconstruction for Whole Genome Data
In this paper we describe our design and characterization of a co-processor architecture to accelerate median-based phylogenetic reconstruction for generearrangement data. Our curr...
Jason D. Bakos, Panormitis E. Elenis, Jijun Tang
DAC
2005
ACM
13 years 9 months ago
TCAM enabled on-chip logic minimization
This paper presents an eļ¬ƒcient hardware architecture of an on-chip logic minimization coprocessor. The proposed architecture employs TCAM cells to provide fastest and memory eļ¬...
Seraj Ahmad, Rabi N. Mahapatra
NIXDORF
1992
116views Hardware» more  NIXDORF 1992»
13 years 11 months ago
Programmable Active Memories: A Performance Assessment
We present some quantitative performance measurements for the computing power of Programmable Active Memories (PAM), as introduced by [2]. Based on Field Programmable Gate Array (...
Patrice Bertin, Didier Roncin, Jean Vuillemin