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» Designing a Coprocessor for Recurrent Computations
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JPDC
2000
141views more  JPDC 2000»
13 years 7 months ago
A System for Evaluating Performance and Cost of SIMD Array Designs
: SIMD arrays are likely to become increasingly important as coprocessors in domain specific systems as architects continue to leverage RAM technology in their design. The problem ...
Martin C. Herbordt, Jade Cravy, Renoy Sam, Owais K...
TACO
2008
130views more  TACO 2008»
13 years 7 months ago
Efficient hardware code generation for FPGAs
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Zhi Guo, Walid A. Najjar, Betul Buyukkurt
ISPAN
2005
IEEE
14 years 1 months ago
An FPGA-Based Floating-Point Jacobi Iterative Solver
Within the parallel computing domain, field programmable gate arrays (FPGA) are no longer restricted to their traditional role as substitutes for application-specific integrated...
Gerald R. Morris, Viktor K. Prasanna
IEEEPACT
2008
IEEE
14 years 1 months ago
Mars: a MapReduce framework on graphics processors
We design and implement Mars, a MapReduce framework, on graphics processors (GPUs). MapReduce is a distributed programming framework originally proposed by Google for the ease of ...
Bingsheng He, Wenbin Fang, Qiong Luo, Naga K. Govi...
IPPS
2009
IEEE
14 years 2 months ago
Long time-scale simulations of in vivo diffusion using GPU hardware
To address the problem of performing long time simulations of biochemical pathways under in vivo cellular conditions, we have developed a lattice-based, reaction-diffusion model t...
Elijah Roberts, John E. Stone, Leonardo Sepulveda,...