2945 search results - page 118 / 589 » Designing and Implementing Malicious Hardware |
124
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ISCAS
2007
IEEE
15 years 11 months ago
2007
IEEE
— The complexity of Finite Impulse Response (FIR) filters is dominated by the number of adders (subtractors) used to implement the coefficient multipliers. A greedy Common Subexp...
118
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AFRICACRYPT
2008
Springer
15 years 11 months ago
2008
Springer
Abstract. This paper presents an updated implementation of the Advanced Encryption Standard (AES) on the recent Xilinx Virtex-5 FPGAs. We show how a modified slice structure in th...
116
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ISCAS
2005
IEEE
15 years 10 months ago
2005
IEEE
We propose an analog current-mode subthreshold CMOS circuit implementing a neuromorphic oscillator. Our circuit is based on the half-center oscillator model proposed by Matsuoka, ...
124
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APCSAC
2000
IEEE
15 years 9 months ago
2000
IEEE
Hardware square-root units require large numbers of gates even for iterative implementations. In this paper, we present four low-cost high-performance fullypipelined n-select impl...
151
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WCNC
2010
IEEE
15 years 8 months ago
2010
IEEE
—We describe our experience from the implementation of the T-MAC protocol for wireless sensor networks in the open-source Castalia simulator. Notwithstanding the popularity of th...