2945 search results - page 120 / 589 » Designing and Implementing Malicious Hardware |
140
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ISCAS
2005
IEEE
15 years 10 months ago
2005
IEEE
Abstract— Time encoding is a mechanism for representing the information contained in a continuous time, bandlimited, analog signal as the zero-crossings of a binary signal. Time ...
133
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ISMVL
2010
IEEE
15 years 9 months ago
2010
IEEE
— In this paper we review the Billiard Ball Model (BBM) introduced by Toffoli and Fredkin. The analysis of a previous approach to design reversible networks based on BBM it shown...
138
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CATA
2003
15 years 6 months ago
2003
Binary morphological operations are a building block in many computer vision applications. Several iterative morphological operations are commonly performed for image analysis res...
130
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ICCD
2008
IEEE
16 years 1 months ago
2008
IEEE
High associativity is important for level-two cache designs [9]. Implementing CAM-based Highly Associative Caches (CAM-HAC), however, is both costly in hardware and exhibits poor s...
117
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FPL
2009
Springer
15 years 9 months ago
2009
Springer
As a step torward a viable, single-issue out-of-order soft core, this work presents Copy-Free Checkpointing (CFC), an FPGA-friendly register renaming design. CFC supports speculat...