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» Designing and Implementing Malicious Hardware
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ISCAS
2003
IEEE
100views Hardware» more  ISCAS 2003»
15 years 9 months ago
Area-effective FIR filter design for multiplier-less implementation
The hardware complexity of digital filters is not controllable by straightforwardly rounding the coefficients to the quantization levels. In this paper, we propose an effective al...
Tay-Jyi Lin, Tsung-Hsun Yang, Chein-Wei Jen
FPL
2010
Springer
267views Hardware» more  FPL 2010»
15 years 2 months ago
A Comparison of Hardware Acceleration Interfaces in a Customizable Soft Core Processor
Due to the continuously decreasing cost of FPGAs, they have become a valid implementation platform for SOCs. Typically, a soft core processor implementation is used to execute the ...
Gerald Hempel, Christian Hochberger, Andreas Koch
ICC
2007
IEEE
144views Communications» more  ICC 2007»
15 years 10 months ago
On Mitigating In-band Wormhole Attacks in Mobile Ad Hoc Networks
— Colluding malicious insider nodes with no special hardware capability can use packet encapsulation and tunnelling to create bogus short-cuts (in-band wormholes) in routing path...
Xu Su, Rajendra V. Boppana
FMCAD
2007
Springer
15 years 7 months ago
Transaction Based Modeling and Verification of Hardware Protocols
Modeling hardware through atomic guard/action transitions with interleaving semantics is popular, owing to the conceptual clarity of modeling and verifying the high level behavior ...
Xiaofang Chen, Steven M. German, Ganesh Gopalakris...
SIGMETRICS
2008
ACM
128views Hardware» more  SIGMETRICS 2008»
15 years 3 months ago
Loss-aware network coding for unicast wireless sessions: design, implementation, and performance evaluation
Local network coding is growing in prominence as a technique to facilitate greater capacity utilization in multi-hop wireless networks. A specific objective of such local network ...
Shravan K. Rayanchu, Sayandeep Sen, Jianming Wu, S...