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» Designing and Implementing Malicious Hardware
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113
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FPGA
2007
ACM
114views FPGA» more  FPGA 2007»
15 years 10 months ago
Design of a logic element for implementing an asynchronous FPGA
A reconfigurable logic element (LE) is developed for use in constructing a NULL Convention Logic (NCL) FPGA. It can be configured as any of the 27 fundamental NCL gates, including...
Scott C. Smith
139
Voted
ICPP
2000
IEEE
15 years 8 months ago
Issues in Designing and Implementing a Scalable Virtual Interface Architecture
The Virtual Interface Architecture brings the benefits of low latency User-level Networking to a cluster environment. With an increasing number of communication channels created ...
Shailabh Nagar, Anand Sivasubramaniam, Jorge Rodri...
ACSAC
2005
IEEE
15 years 9 months ago
Stealth Breakpoints
Microscopic analysis of malicious code (malware) requires the aid of a variety of powerful tools. Chief among them is a debugger that enables runtime binary analysis at an instruc...
Amit Vasudevan, Ramesh Yerraballi
DSD
2007
IEEE
178views Hardware» more  DSD 2007»
15 years 10 months ago
An Efficient Intra Prediction Hardware Architecture for H.264 Video Decoding
In this paper, we present an efficient hardware architecture for real-time implementation of intra prediction algorithm used in H.264 / MPEG4 Part 10 video coding standard. The ha...
Esra Sahin, Ilker Hamzaoglu
ICNP
2009
IEEE
15 years 10 months ago
Better by a HAIR: Hardware-Amenable Internet Routing
—Routing protocols are implemented in the form of software running on a general-purpose microprocessor. However, conventional software-based router architectures face significan...
Firat Kiyak, Brent Mochizuki, Eric Keller, Matthew...