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MICRO
2010
IEEE
132views Hardware» more  MICRO 2010»
15 years 4 months ago
Parichute: Generalized Turbocode-Based Error Correction for Near-Threshold Caches
Energy efficiency is a primary concern for microprocessor designers. A very effective approach to improving the energy efficiency of a chip is to lower its supply voltage to very ...
Timothy N. Miller, Renji Thomas, James Dinan, Bruc...
ECMDAFA
2009
Springer
127views Hardware» more  ECMDAFA 2009»
15 years 4 months ago
Derivation and Refinement of Textual Syntax for Models
Textual Syntax (TS) as a form of model representation has made its way to the Model-Driven Software Development community and is considered a viable alternative to graphical repres...
Florian Heidenreich, Jendrik Johannes, Sven Karol,...

Publication
266views
14 years 11 months ago
NeuFlow: A Runtime Reconfigurable Dataflow Processor for Vision
In this paper we present a scalable dataflow hard- ware architecture optimized for the computation of general- purpose vision algorithms—neuFlow—and a dataflow compiler—luaFl...
C. Farabet, B. Martini, B. Corda, P. Akselrod, E. ...
CODES
2005
IEEE
15 years 11 months ago
Comparing two testbench methods for hierarchical functional verification of a bluetooth baseband adaptor
The continuous improvement on the design methodologies and processes has made possible the creation of huge and very complex digital systems. Design verification is one of the mai...
Edgar L. Romero, Marius Strum, Wang Jiang Chau
SIPS
2008
IEEE
16 years 17 days ago
Unified decoder architecture for LDPC/turbo codes
Low-density parity-check (LDPC) codes on par with convolutional turbo codes (CTC) are two of the most powerful error correction codes known to perform very close to the Shannon li...
Yang Sun, Joseph R. Cavallaro