2945 search results - page 463 / 589 » Designing and Implementing Malicious Hardware |
187
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RTSS
2006
IEEE
16 years 5 days ago
2006
IEEE
Modern FPGA devices, which include (multiple) processor core(s) as diffused IP on the silicon die, provide an excellent platform for developing custom multiprocessor systems-on-pr...
173
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CF
2010
ACM
15 years 11 months ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
180
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HPDC
2010
IEEE
2010
IEEE
XCo: explicit coordination to prevent network fabric congestion in cloud computing cluster platforms
15 years 7 months ago
Large cluster-based cloud computing platforms increasingly use commodity Ethernet technologies, such as Gigabit Ethernet, 10GigE, and Fibre Channel over Ethernet (FCoE), for intra...
211
Voted
SIGMETRICS
2008
ACM
15 years 6 months ago
2008
ACM
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many appro...
184
Voted
CODES
2007
IEEE
16 years 16 days ago
2007
IEEE
Multiprocessor SoCs are increasingly deployed in embedded systems with little or no security features built in. Code Injection attacks are one of the most commonly encountered sec...