2945 search results - page 51 / 589 » Designing and Implementing Malicious Hardware |
152
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IEEEPACT
2005
IEEE
15 years 9 months ago
2005
IEEE
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
111
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MSS
2007
IEEE
15 years 10 months ago
2007
IEEE
Data storage requirements have constantly evolved over time. In recent times, the rate of increase in volume of data has been exponential, partly because of regulations and partly...
136
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ITCC
2005
IEEE
15 years 9 months ago
2005
IEEE
In many applications a software implementation of ECC (Elliptic Curve Cryptography) might be inappropriate due to performance requirements, therefore hardware implementations are ...
128
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TVLSI
2010
14 years 10 months ago
2010
Abstract--Image and video signals might be corrupted by impulse noise in the process of signal acquisition and transmission. In this paper, an efficient VLSI implementation for rem...
167
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ISCA
1996
IEEE
15 years 8 months ago
1996
IEEE
This paper investigates hardware support for fine-grain distributed shared memory (DSM) in networks of workstations. To reduce design time and implementation cost relative to dedi...