2945 search results - page 538 / 589 » Designing and Implementing Malicious Hardware |
138
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FCCM
2006
IEEE
15 years 10 months ago
2006
IEEE
The growth in size and performance of Field Programmable Gate Arrays (FPGAs) has compelled System-on-aProgrammable-Chip (SoPC) designers to use soft processors for controlling sys...
150
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IEEEPACT
2005
IEEE
15 years 10 months ago
2005
IEEE
Hiding communication latency is an important optimization for parallel programs. Programmers or compilers achieve this by using non-blocking communication primitives and overlappi...
157
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PLDI
1994
ACM
15 years 8 months ago
1994
ACM
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
144
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CIDR
2009
15 years 5 months ago
2009
The traditional architecture for a DBMS engine has the recovery, concurrency control and access method code tightly bound together in a storage engine for records. We propose a di...
167
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SENSYS
2010
ACM
15 years 2 months ago
2010
ACM
Supporting continuous sensing applications on mobile phones is challenging because of the resource demands of long-term sensing, inference and communication algorithms. We present...