2945 search results - page 556 / 589 » Designing and Implementing Malicious Hardware |
121
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ASAP
2004
IEEE
15 years 7 months ago
2004
IEEE
Large register file with multiple ports is a critical component of a high-performance processor. A large number of registers are necessary for processing a larger number of in-fli...
149
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CAV
2006
Springer
15 years 7 months ago
2006
Springer
Example Guided Abstraction Refinement (CEGAR) [6] framework. A number of wellengineered software model-checkers are available, e.g., SLAM [1] and BLAST [12]. Why build another one?...
151
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ICCD
2000
IEEE
15 years 7 months ago
2000
IEEE
A major obstacle to widespread acceptance of formal verification is the difficulty in using the tools effectively. Although learning the basic syntax and operation of a formal ver...
135
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FPGA
1995
ACM
15 years 7 months ago
1995
ACM
During the development of computer peripherals which interface to the processor via the system bus it is often necessary to acquire the signals on the bus at the hardware level. I...
138
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DSD
2010
IEEE
15 years 4 months ago
2010
IEEE
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...