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» Designing and Implementing Malicious Hardware
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ANCS
2009
ACM
15 years 1 months ago
Progressive hashing for packet processing using set associative memory
As the Internet grows, both the number of rules in packet filtering databases and the number of prefixes in IP lookup tables inside the router are growing. The packet processing e...
Michel Hanna, Socrates Demetriades, Sangyeun Cho, ...
ASPLOS
2011
ACM
14 years 7 months ago
MemScale: active low-power modes for main memory
Main memory is responsible for a large and increasing fraction of the energy consumed by servers. Prior work has focused on exploiting DRAM low-power states to conserve energy. Ho...
Qingyuan Deng, David Meisner, Luiz E. Ramos, Thoma...
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MOBISYS
2011
ACM
14 years 6 months ago
Exploiting FM radio data system for adaptive clock calibration in sensor networks
Clock synchronization is critical for Wireless Sensor Networks (WSNs) due to the need of inter-node coordination and collaborative information processing. Although many message pa...
Liqun Li, Guoliang Xing, Limin Sun, Wei Huangfu, R...
PEPM
2009
ACM
17 years 4 months ago
Static Consistency Checking for Verilog Wire Interconnects
The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...
Cherif Salama, Gregory Malecha, Walid Taha, Jim Gr...
DAC
2007
ACM
16 years 5 months ago
A System For Coarse Grained Memory Protection In Tiny Embedded Processors
Many embedded systems contain resource constrained microcontrollers where applications, operating system components and device drivers reside within a single address space with no...
Ram Kumar, Akhilesh Singhania, Andrew Castner, Edd...