2945 search results - page 56 / 589 » Designing and Implementing Malicious Hardware |
113
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APCCAS
2006
IEEE
15 years 10 months ago
2006
IEEE
We described an H.264 decoder implemented with our design methodology, in which a system function model of transaction level is first captured in SystemC and refined into RTL with ...
155
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ASYNC
2004
IEEE
15 years 7 months ago
2004
IEEE
One of the main reasons for using asynchronous design is that it offers the opportunity to exploit the datadependent latency of many operations in order to achieve low-power, high...
147
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OOPSLA
2009
Springer
15 years 10 months ago
2009
Springer
Software has spent the bounty of Moore’s law by solving harder problems and exploiting abstractions, such as highlevel languages, virtual machine technology, binary rewritdynami...
183
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TVLSI
2008
2008
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
15 years 4 months ago
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
111
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ISSS
1997
IEEE
15 years 8 months ago
1997
IEEE
Given a hardware/software partitioned specification and an allocation (number and type) of processors, we present an algorithm to (1) map each of the software behaviors (or tasks...