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FPL
2001
Springer
92views Hardware» more  FPL 2001»
15 years 9 months ago
Secure Configuration of Field Programmable Gate Arrays
Although SRAM programmed Field Programmable Gate Arrays (FPGA's) have come to dominate the industry due to their density and performance advantages over non-volatile technolog...
Tom Kean
DSD
2002
IEEE
73views Hardware» more  DSD 2002»
15 years 9 months ago
Implementation of a Streaming Execution Unit
The Complex Streamed Instruction (CSI) set is an instruction set extension targeted at multimedia applications. CSI instructions process two-dimensional data streams stored in mem...
Dmitry Cheresiz, Ben H. H. Juurlink, Stamatis Vass...
TC
2010
15 years 2 months ago
Network-on-Chip Hardware Accelerators for Biological Sequence Alignment
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pr...
HIPEAC
2010
Springer
15 years 6 months ago
Improving Performance by Reducing Aborts in Hardware Transactional Memory
The optimistic nature of Transactional Memory (TM) systems can lead to the concurrent execution of transactions that are later found to conflict. Conflicts degrade scalability, a...
Mohammad Ansari, Behram Khan, Mikel Luján, ...
PDP
2010
IEEE
15 years 8 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...