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PAIRING
2010
Springer
153views Cryptology» more  PAIRING 2010»
15 years 2 months ago
Compact Hardware for Computing the Tate Pairing over 128-Bit-Security Supersingular Curves
This paper presents a novel method for designing compact yet efficient hardware implementations of the Tate pairing over supersingular curves in small characteristic. Since such cu...
Nicolas Estibals
FCCM
2000
IEEE
122views VLSI» more  FCCM 2000»
15 years 9 months ago
Evaluating Hardware Compilation Techniques
Hardware compilation techniques which use highlevel programming languages to describe and synthesize hardware are gaining popularity. They are especially useful for reconfigurable...
Markus Weinhardt, Wayne Luk
ICCCN
2008
IEEE
15 years 11 months ago
Sentinel: Hardware-Accelerated Mitigation of Bot-Based DDoS Attacks
—Effective defenses against DDoS attacks that deplete resources at the network and transport layers have been deployed commercially. Therefore, DDoS attacks increasingly use norm...
Peter Djalaliev, Muhammad Jamshed, Nicholas Farnan...
CAINE
2006
15 years 5 months ago
A novel parallel hardware and software solution for a large-scale biologically realistic cortical simulation
This research addresses a major gap in our conceptual understanding of synaptic and brain-like network dynamics. Over the course of several years we have designed and implemented ...
Frederick C. Harris Jr., Mark C. Ballew, Jason Bau...
CVIU
2010
267views more  CVIU 2010»
15 years 1 months ago
Accelerated hardware video object segmentation: From foreground detection to connected components labelling
This paper demonstrates the use of a single-chip FPGA for the segmentation of moving objects in a video sequence. The system maintains highly accurate background models, and integ...
Kofi Appiah, Andrew Hunter, Patrick Dickinson, Hon...