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VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
14 years 4 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
POS
2000
Springer
14 years 1 months ago
TMOS: A Transactional Garbage Collector
Abstract. Defining persistence in terms of reachability is fundamental to achieving orthogonality of persistence. It is implicit to the principles of orthogonal persistence and is ...
John N. Zigman, Stephen Blackburn, J. Eliot B. Mos...
EAAI
2008
128views more  EAAI 2008»
13 years 10 months ago
Dual heuristic programming based nonlinear optimal control for a synchronous generator
This paper presents the design of an infinite horizon nonlinear optimal neurocontroller that replaces the conventional automatic voltage regulator and the turbine governor (CONVC)...
Jung-Wook Park, Ronald G. Harley, Ganesh K. Venaya...
ASPLOS
2011
ACM
13 years 1 months ago
Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
Luke Dalessandro, François Carouge, Sean Wh...
HPDC
2008
IEEE
14 years 4 months ago
StoreGPU: exploiting graphics processing units to accelerate distributed storage systems
Today Graphics Processing Units (GPUs) are a largely underexploited resource on existing desktops and a possible costeffective enhancement to high-performance systems. To date, mo...
Samer Al-Kiswany, Abdullah Gharaibeh, Elizeu Santo...