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ASPDAC
2005
ACM
97views Hardware» more  ASPDAC 2005»
14 years 1 months ago
Opportunities and challenges for better than worst-case design
The progressive trend of fabrication technologies towards the nanometer regime has created a number of new physical design challenges for computer architects. Design complexity, u...
Todd M. Austin, Valeria Bertacco, David Blaauw, Tr...
ICCD
2005
IEEE
119views Hardware» more  ICCD 2005»
14 years 4 months ago
Deployment of Better Than Worst-Case Design: Solutions and Needs
The advent of nanometer feature sizes in silicon fabrication has triggered a number of new design challenges for computer designers. These challenges include design complexity and...
Todd M. Austin, Valeria Bertacco
STOC
2003
ACM
100views Algorithms» more  STOC 2003»
14 years 8 months ago
Simpler and better approximation algorithms for network design
Anupam Gupta, Amit Kumar, Tim Roughgarden
FPGA
2008
ACM
184views FPGA» more  FPGA 2008»
13 years 9 months ago
Mapping for better than worst-case delays in LUT-based FPGA designs
Current advances in chip design and manufacturing have allowed IC manufacturing to approach the nanometer range. As the feature size scales down, greater variability is experience...
Kirill Minkovich, Jason Cong