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» Designing floating codes for expected performance
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ACMMSP
2004
ACM
92views Hardware» more  ACMMSP 2004»
14 years 25 days ago
Instruction combining for coalescing memory accesses using global code motion
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatan...
ISCA
2007
IEEE
192views Hardware» more  ISCA 2007»
14 years 1 months ago
Analysis of redundancy and application balance in the SPEC CPU2006 benchmark suite
The recently released SPEC CPU2006 benchmark suite is expected to be used by computer designers and computer architecture researchers for pre-silicon early design analysis. Partia...
Aashish Phansalkar, Ajay Joshi, Lizy Kurian John
ACIVS
2006
Springer
14 years 1 months ago
Scalable and Channel-Adaptive Unequal Error Protection of Images with LDPC Codes
This paper considers the design of an optimal joint source-channel coding system employing scalable wavelet-based source coders and unequal error protection for error-resilient tra...
Adrian Munteanu, Maryse R. Stoufs, Jan Cornelis, P...
EUMAS
2006
13 years 8 months ago
Agent Capability: Automating the Design to Code Process
Current IT application domains such as web services and autonomic computing call for highly flexible systems, able to automatically adapt to changing operational environments as w...
Loris Penserini, Anna Perini, Angelo Susi, John My...
CODES
2008
IEEE
13 years 9 months ago
A time-predictable system initialization design for huge-capacity flash-memory storage systems
The capacity of flash-memory storage systems grows at a speed similar to many other storage systems. In order to properly manage the product cost, vendors face serious challenges ...
Chin-Hsien Wu