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» Designing for Xilinx XC6200 FPGAs
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IJES
2006
99views more  IJES 2006»
13 years 7 months ago
Dynamic reconfiguration for management of radiation-induced faults in FPGAs
This paper describes novel methods of exploiting the partial, dynamic reconfiguration capabilities of Xilinx Virtex V1000 FPGAs to manage single-event upset (SEU) faults due to rad...
Maya Gokhale, Paul Graham, Michael J. Wirthlin, Da...
ARC
2006
Springer
201views Hardware» more  ARC 2006»
13 years 11 months ago
Dynamic Partial Reconfigurable FIR Filter Design
Abstract. This paper presents a novel partially reconfigurable FIR filter design that employs dynamic partial reconfiguration. Our scope is to implement a low-power, area-efficient...
Yeong-Jae Oh, Hanho Lee, Chong Ho Lee
ERSA
2008
185views Hardware» more  ERSA 2008»
13 years 9 months ago
Design Framework for Partial Run-Time FPGA Reconfiguration
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increa...
Chris Conger, Ann Gordon-Ross, Alan D. George
TC
2008
13 years 7 months ago
High-Performance Designs for Linear Algebra Operations on Reconfigurable Hardware
Numerical linear algebra operations are key primitives in scientific computing. Performance optimizations of such operations have been extensively investigated. With the rapid adva...
Ling Zhuo, Viktor K. Prasanna
FPGA
2009
ACM
201views FPGA» more  FPGA 2009»
14 years 2 months ago
A high-performance FPGA architecture for restricted boltzmann machines
Despite the popularity and success of neural networks in research, the number of resulting commercial or industrial applications have been limited. A primary cause of this lack of...
Daniel L. Ly, Paul Chow