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CHES
2005
Springer
146views Cryptology» more  CHES 2005»
15 years 10 months ago
AES on FPGA from the Fastest to the Smallest
Two new FPGA designs for the Advanced Encryption Standard (AES) are presented. The first is believed to be the fastest, achieving 25 Gbps throughput using a Xilinx Spartan-III (XC3...
Tim Good, Mohammed Benaissa
SIGMETRICS
2010
ACM
180views Hardware» more  SIGMETRICS 2010»
15 years 2 months ago
Route oracle: where have all the packets gone?
Many network-management problems in large backbone networks need the answer to a seemingly simple question: where does a given IP packet, entering the network at a particular plac...
Yaping Zhu, Jennifer Rexford, Subhabrata Sen, Aman...
EDOC
2002
IEEE
15 years 9 months ago
Model Driven Geo-Information System's Development
Continuous change of user requirements has become a constant for geo-information systems. Designing systems that can adapt to such changes requires an appropriate ethodology that ...
Javier Morales, Luís Ferreira Pires, Marten...
215
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ISJGP
2010
15 years 1 months ago
On the Hardware Implementation Cost of Crypto-Processors Architectures
A variety of modern technologies such as networks, Internet, and electronic services demand private and secure communications for a great number of everyday transactions. Security ...
Nicolas Sklavos
IROS
2008
IEEE
108views Robotics» more  IROS 2008»
15 years 11 months ago
Robots at home: Understanding long-term human-robot interaction
— Human-robot interaction (HRI) is now well enough understood to allow us to build useful systems that can function outside of the laboratory. We are studying longterm interactio...
Cory D. Kidd, Cynthia Breazeal