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108
Voted
DSD
2002
IEEE
103views Hardware» more  DSD 2002»
15 years 8 months ago
On the Fundamental Design Gap in Terabit per Second Packet Switching
We discuss the gap we experience in an industrial design path of high-speed packet switches. As bandwidth demand exceeds progress in CMOS technology, system architects are forced ...
M. Verhappen, P. H. A. van der Putten, Jeroen Voet...
99
Voted
KIC
2000
15 years 4 months ago
Kinematics Support for Design and Simulation of Mechatronic Systems
: We present a framework that verifies and maintains the consistency between the representations of the form, function and behavior of mechatronic devices. These three aspects of t...
Rajarishi Sinha, Christiaan J. J. Paredis, Pradeep...
133
Voted
CHI
1998
ACM
15 years 7 months ago
New Media, New Practices: Experiences in Open Learning Course Design
We explore some of the complex issues surrounding the design and use of multimedia and Internet-based learning resources in distance education courses. We do so by analysing our e...
Tamara Sumner, Josie Taylor
117
Voted
BMCBI
2008
114views more  BMCBI 2008»
15 years 3 months ago
Testing the Coulomb/Accessible Surface Area solvent model for protein stability, ligand binding, and protein design
Background: Protein structure prediction and computational protein design require efficient yet sufficiently accurate descriptions of aqueous solvent. We continue to evaluate the ...
Marcel Schmidt am Busch, Anne Lopes, Najette Amara...
114
Voted
ICCAD
1994
IEEE
65views Hardware» more  ICCAD 1994»
15 years 7 months ago
Incremental formal design verification
Language containment is a method for design verification that involves checking if the behavior of the system to be verified is a subset of the behavior of the specifications (pro...
Gitanjali Swamy, Robert K. Brayton