Sciweavers

453 search results - page 4 / 91
» Designing hardware with dynamic memory abstraction
Sort
View
ICES
2000
Springer
91views Hardware» more  ICES 2000»
14 years 1 months ago
Dynamic Optimisation of Non-linear Feed Forward Circuits
Abstract. An evolutionary algorithm is used to evolve a digital circuit which computes a simple hash function mapping a 16-bit address space into an 8-bit one. The target technolog...
Ernesto Damiani, Valentino Liberali, Andrea Tettam...
FPL
2004
Springer
164views Hardware» more  FPL 2004»
14 years 1 months ago
Dynamic Prefetching in the Virtual Memory Window of Portable Reconfigurable Coprocessors
Abstract. In Reconfigurable Systems-On-Chip (RSoCs), operating systems can primarily (1) manage the sharing of limited reconfigurable resources, and (2) support communication betwe...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
ICCAD
2007
IEEE
137views Hardware» more  ICCAD 2007»
14 years 6 months ago
Combining static and dynamic defect-tolerance techniques for nanoscale memory systems
Abstract— Nanoscale technology promises dramatically increased device density, but also decreased reliability. With bit error rates projected to be as high as 10%, designing a us...
Susmit Biswas, Gang Wang, Tzvetan S. Metodi, Ryan ...
IWSOC
2003
IEEE
137views Hardware» more  IWSOC 2003»
14 years 3 months ago
Hardware Partitioning Software for Dynamically Reconfigurable SoC Design
CAD tools support is essential in the success of today digital system design methodologies. Unfortunately, most of the classical design tools do not take into account the possibil...
Philippe Brunet, Camel Tanougast, Yves Berviller, ...
FPL
2000
Springer
115views Hardware» more  FPL 2000»
14 years 1 months ago
Efficient Self-Reconfigurable Implementations Using On-chip Memory
abstract the dynamic nature of a computation to embedded data memory (which is accessible on-chip). The dynamic nature of a computation corresponds to the dynamic features of its i...
Sameer Wadhwa, Andreas Dandalis