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FPL
2010
Springer
267views Hardware» more  FPL 2010»
13 years 7 months ago
A Comparison of Hardware Acceleration Interfaces in a Customizable Soft Core Processor
Due to the continuously decreasing cost of FPGAs, they have become a valid implementation platform for SOCs. Typically, a soft core processor implementation is used to execute the ...
Gerald Hempel, Christian Hochberger, Andreas Koch
DELTA
2004
IEEE
14 years 21 days ago
Scan Test of IP Cores in an ATE Environment
Manufacturing test of chips made of multiple IP cores requires different techniques if ATE is used. As scan chains are commonly used as access paths to the DUT, ATE architectures ...
Luca Schiano, Yong-Bin Kim, Fabrizio Lombardi
BMCBI
2010
149views more  BMCBI 2010»
13 years 9 months ago
S3DB core: a framework for RDF generation and management in bioinformatics infrastructures
Background: Biomedical research is set to greatly benefit from the use of semantic web technologies in the design of computational infrastructure. However, beyond well defined res...
Jonas S. Almeida, Helena F. Deus, Wolfgang Maass
DAC
2007
ACM
14 years 10 months ago
The KILL Rule for Multicore
Multicore has shown significant performance and power advantages over single cores in commercial systems with a 2-4 cores. Applying a corollary of Moore's Law for multicore, ...
Anant Agarwal, Markus Levy
CNSR
2006
IEEE
111views Communications» more  CNSR 2006»
14 years 3 months ago
Transparent Ring-to-Ring Interconnection for Metro Core Optical Network
The deployment of Reconfigurable Optical Add/Drop Multiplexers (ROADMs) is going to change the conventional architecture for metro networks. In this paper, we present detailed fea...
Choudhury A. Al Sayeed, Alex Vukovic, Oliver W. W....