2546 search results - page 433 / 510 » Designing the Future |
154
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DAC
2002
ACM
16 years 5 months ago
2002
ACM
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
148
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WWW
2005
ACM
16 years 4 months ago
2005
ACM
Computer users are asked to generate, keep secret, and recall an increasing number of passwords for uses including host accounts, email servers, e-commerce sites, and online finan...
246
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ASPLOS
2009
ACM
16 years 4 months ago
2009
ACM
Future processors are expected to observe increasing rates of hardware faults. Using Dual-Modular Redundancy (DMR), two cores of a multicore can be loosely coupled to redundantly ...
111
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CHI
2009
ACM
16 years 4 months ago
2009
ACM
Passive brain-computer interfaces are designed to use brain activity as an additional input, allowing the adaptation of the interface in real time according to the user's men...
131
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MOBIHOC
2009
ACM
16 years 4 months ago
2009
ACM
Most future large-scale sensor networks are expected to follow a two-tier architecture which consists of resource-rich master nodes at the upper tier and resource-poor sensor node...