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ASPDAC
2007
ACM
158views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Symbolic Model Checking of Analog/Mixed-Signal Circuits
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
QEST
2005
IEEE
14 years 28 days ago
iLTLChecker: A Probabilistic Model Checker for Multiple DTMCs
iLTL is a probabilistic temporal logic that can specify properties of multiple discrete time Markov chains (DTMCs). In this paper, we describe two related tools: MarkovEstimator a...
YoungMin Kwon, Gul A. Agha
FMICS
2007
Springer
14 years 1 months ago
An Action/State-Based Model-Checking Approach for the Analysis of Communication Protocols for Service-Oriented Applications
Abstract. In this paper we present an action/state-based logical framework for the analysis and verification of complex systems, which relies on the definition of doubly labelled...
Maurice H. ter Beek, Alessandro Fantechi, Stefania...
SIGSOFT
2010
ACM
13 years 5 months ago
An effective dynamic analysis for detecting generalized deadlocks
We present an effective dynamic analysis for finding a broad class of deadlocks, including the well-studied lock-only deadlocks as well as the less-studied, but no less widespread...
Pallavi Joshi, Mayur Naik, Koushik Sen, David Gay
FSTTCS
2004
Springer
14 years 22 days ago
Symbolic Reachability Analysis of Higher-Order Context-Free Processes
We consider the problem of symbolic reachability analysis of higher-order context-free processes. These models are generalizations of the context-free processes (also called BPA pr...
Ahmed Bouajjani, Antoine Meyer