Sciweavers

434 search results - page 71 / 87
» Detection and correction of design defects in object-oriente...
Sort
View
CAV
1998
Springer
175views Hardware» more  CAV 1998»
13 years 11 months ago
An ACL2 Proof of Write Invalidate Cache Coherence
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...
J. Strother Moore
USENIX
2008
13 years 10 months ago
Idle Read After Write - IRAW
Despite a low occurrence rate, silent data corruption represents a growing concern for storage systems designers. Throughout the storage hierarchy, from the file system down to th...
Alma Riska, Erik Riedel
PLDI
2010
ACM
13 years 10 months ago
DRFX: a simple and efficient memory model for concurrent programming languages
The most intuitive memory model for shared-memory multithreaded programming is sequential consistency (SC), but it disallows the use of many compiler and hardware optimizations th...
Daniel Marino, Abhayendra Singh, Todd D. Millstein...
BMCBI
2007
247views more  BMCBI 2007»
13 years 7 months ago
A survey of DNA motif finding algorithms
Background: Unraveling the mechanisms that regulate gene expression is a major challenge in biology. An important task in this challenge is to identify regulatory elements, especi...
Modan K. Das, Ho-Kwok Dai
CVPR
2003
IEEE
14 years 9 months ago
Practical Super-Resolution from Dynamic Video Sequences
This paper introduces a practical approach for superresolution, the process of reconstructing a high-resolution image from the low-resolution input ones. The emphasis of our work ...
Zhongding Jiang, Tien-Tsin Wong, Hujun Bao