395 search results - page 23 / 79 » Determining the Idle Time of a Tiling: New Results |
FPGA
2000
ACM
13 years 11 months ago
2000
ACM
In this paper we present a "high-level" FPGA architecture description language which lets FPGA architects succinctly and quickly describe an FPGA routing architecture. W...
ICPP
1999
IEEE
13 years 12 months ago
1999
IEEE
The probability of failures in software distributed shared memory (SDSM) increases as the system size grows. This paper introduces a new, efficient message logging technique, call...
CCGRID
2007
IEEE
14 years 2 months ago
2007
IEEE
Increasing power consumption of high-performance systems leads to reliability, survivability, and cooling related problems. Motivated by this observation, several recent efforts f...
MANSCI
2010
13 years 6 months ago
2010
Firms that rely on functioning mission-critical equipment for their businesses cannot a¤ord signi…cant operational downtime due to system disruptions. To minimize the impact of...
RTSS
2002
IEEE
14 years 18 days ago
2002
IEEE
This paper presents a new workload model, called the state-dependent deadline model, for applications whose high-level timing requirements may change with time. The problem is how...