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» Diagonal routing in high performance microprocessor design
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JPDC
2008
128views more  JPDC 2008»
13 years 8 months ago
An interference-aware fair scheduling for multicast in wireless mesh networks
Multicast is a fundamental routing service in wireless mesh networks (WMNs) due to its many potential applications such as video conferencing, online games, and webcast. Recently,...
Dimitrios Koutsonikolas, Saumitra M. Das, Y. Charl...
FPL
2009
Springer
102views Hardware» more  FPL 2009»
14 years 1 months ago
Macs: A Minimal Adaptive routing circuit-switched architecture for scalable and parametric NoCs
Networks-on-Chips (NoCs) are an emerging communication topology paradigm in single chip VLSI design, enhancing parallelism and system scalability. Processing units (PUs) connect t...
Rohit Kumar, Ann Gordon-Ross
ISQED
2005
IEEE
81views Hardware» more  ISQED 2005»
14 years 2 months ago
Exact Algorithms for Coupling Capacitance Minimization by Adding One Metal Layer
Due to the rapid development of manufacturing process technology and tight marketing schedule, the chip design and manufacturing always work toward an integrated solution to achie...
Hua Xiang, Kai-Yuan Chao, Martin D. F. Wong
SIGCOMM
2009
ACM
14 years 3 months ago
Optimizing the BSD routing system for parallel processing
The routing architecture of the original 4.4BSD [3] kernel has been deployed successfully without major design modification for over 15 years. In the unified routing architectur...
Qing Li, Kip Macy
IWCMC
2010
ACM
14 years 1 months ago
Only the short die old: route optimization in MANETs by dynamic subconnection shrinking
In reactive routing protocols, active routes for multihop connections retain their topological structure in spite of node movement over time. Unfortunately, node movements may mak...
Zeki Bilgin, Bilal Khan, Ala I. Al-Fuqaha