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» Diagonal routing in high performance microprocessor design
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DAC
2006
ACM
14 years 8 months ago
Fast algorithms for slew constrained minimum cost buffering
As a prevalent constraint, sharp slew rate is often required in circuit design which causes a huge demand for buffering resources. This problem requires ultra-fast buffering techn...
Shiyan Hu, Charles J. Alpert, Jiang Hu, Shrirang K...
SIGCOMM
2003
ACM
14 years 19 days ago
Forwarding in a content-based network
This paper presents an algorithm for content-based forwarding, an essential function in content-based networking. Unlike in traditional address-based unicast or multicast networks...
Antonio Carzaniga, Alexander L. Wolf
SLIP
2003
ACM
14 years 18 days ago
A hierarchical three-way interconnect architecture for hexagonal processors
The problem of interconnect architecture arises when an array of processors needs to be integrated on one chip. With the deep sub-micron technology, devices become cheap while wir...
Feng Zhou, Esther Y. Cheng, Bo Yao, Chung-Kuan Che...
CN
2002
127views more  CN 2002»
13 years 7 months ago
Optimal policy for label switched path setup in MPLS networks
An important aspect in designing a multiprotocol label switching (MPLS) network is to determine an initial topology and to adapt it to the traffic load. A topology change in an MP...
Tricha Anjali, Caterina M. Scoglio, Jaudelice Cava...
IPPS
2006
IEEE
14 years 1 months ago
Implementation of a programmable array processor architecture for approximate string matching algorithms on FPGAs
Approximate string matching problem is a common and often repeated task in information retrieval and bioinformatics. This paper proposes a generic design of a programmable array p...
Panagiotis D. Michailidis, Konstantinos G. Margari...