410 search results - page 77 / 82 » Diagonal routing in high performance microprocessor design |
ISVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
As power consumption of the clock tree dominates over 40% of the total power in modern high performance VLSI designs, measures must be taken to keep it under control. One of the m...
JSAC
2006
13 years 7 months ago
2006
We consider the problem of traffic grooming in WDM path, star, and tree networks. Traffic grooming is a variant of the well-known logical topology design, and is concerned with the...
MOBIHOC
2005
ACM
14 years 7 months ago
2005
ACM
In this paper, we introduce a novel congestion control algorithm for TCP over multihop IEEE 802.11 wireless networks implementing rate-based scheduling of transmissions within the...
WCW
2004
Springer
14 years 21 days ago
2004
Springer
Internet overlay services must adapt to the substrate network topology and link properties to achieve high performance. A common overlay structure management layer is desirable fo...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...