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ICES
2003
Springer
101views Hardware» more  ICES 2003»
14 years 23 days ago
A Developmental Method for Growing Graphs and Circuits
A review is given of approaches to growing neural networks and electronic circuits. A new method for growing graphs and circuits using a developmental process is discussed. The met...
Julian F. Miller, Peter Thomson
ICES
2003
Springer
112views Hardware» more  ICES 2003»
14 years 23 days ago
Using Negative Correlation to Evolve Fault-Tolerant Circuits
In this paper, we show how artificial evolution can be used to improve the fault-tolerance of electronic circuits. We show that evolution is able to improve the fault tolerance of...
Thorsten Schnier, Xin Yao
CEC
2009
IEEE
14 years 2 months ago
Gate-level optimization of polymorphic circuits using Cartesian Genetic Programming
— Polymorphic digital circuits contain ordinary and polymorphic gates. In the past, Cartesian Genetic Programming (CGP) has been applied to synthesize polymorphic circuits at the...
Zbysek Gajda, Lukás Sekanina
ACSD
2006
IEEE
89views Hardware» more  ACSD 2006»
13 years 11 months ago
On process-algebraic verification of asynchronous circuits
Asynchronous circuits have received much attention recently due to their potential for energy savings. Process algebras have been extensively used in the modelling, analysis and sy...
Xu Wang, Marta Z. Kwiatkowska
IPPS
1997
IEEE
13 years 11 months ago
A Comparison of Parallel Approaches for Algebraic Factorization in Logic Synthesis
Algebraic factorization is an extremely important part of any logic synthesis system but is computationally expensive. Hence it is important to look at parallel processing to spee...
Sumit Roy, Prithviraj Banerjee