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EMSOFT
2006
Springer
13 years 11 months ago
Modeling a system controller for timing analysis
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
Stephan Thesing
CDC
2009
IEEE
137views Control Systems» more  CDC 2009»
14 years 7 days ago
Discretization of Linear Fractional Representations of LPV systems
Abstract— Commonly, controllers for Linear ParameterVarying (LPV) systems are designed in continuous-time using a Linear Fractional Representation (LFR) of the plant. However, th...
Roland Tóth, Marco Lovera, Peter S. C. Heub...
ICCAD
2007
IEEE
165views Hardware» more  ICCAD 2007»
13 years 11 months ago
Automated refinement checking of concurrent systems
Stepwise refinement is at the core of many approaches to synthesis and optimization of hardware and software systems. For instance, it can be used to build a synthesis approach for...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta
ISCAS
2007
IEEE
122views Hardware» more  ISCAS 2007»
14 years 1 months ago
Neuromimetic ICs with analog cores: an alternative for simulating spiking neural networks
- This paper aims at discussing the implementation of simulation systems for SNN based on analog computation cores (neuromimetic ICs). Such systems are an alternative to completely...
Sylvie Renaud, Jean Tomas, Yannick Bornat, Adel Da...
ASPDAC
2005
ACM
153views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Design of clocked circuits using UML
– Clocking is an essential component of any embedded system design. However, traditional design techniques are either short of clocking support or too complex for users. The Unif...
Zhenxin Sun, Weng-Fai Wong, Yongxin Zhu, Santhosh ...