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» Digital Image Filter Design Using Evolvable Hardware
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EVOW
2008
Springer
15 years 4 months ago
Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures
Abstract. In this paper we propose three small instances of a reconfigurable circuit and analyze their properties using the brute force method and evolutionary algorithm. Although ...
Lukás Sekanina, Petr Mikusek
118
Voted
DSD
2002
IEEE
110views Hardware» more  DSD 2002»
15 years 7 months ago
A Design for a Low-Power Digital Matched Filter Applicable to W-CDMA
This paper presents a design for a low-power digital matched filter (DMF) applicable to Wideband-Code Division Multiple Access (W-CDMA), which is a Direct-Sequence Spread-Spectrum...
Shoji Goto, Takashi Yamada, Norihisa Takayarna, Yo...
ICIP
2009
IEEE
15 years 5 days ago
Efficient design of 2-D nonseparable filters of low complexity
By using Semi-Definite Programming (SDP) as a tool, a new deign for Two-Dimensional (2-D) Diamond-Shaped (DS) filters is developed. Surprisingly, the diamond shape of the filter is...
Kaveh Fanian, Hoang Duong Tuan, Truong Q. Nguyen
116
Voted
KES
2008
Springer
15 years 2 months ago
Incremental evolution of a signal classification hardware architecture for prosthetic hand control
Evolvable Hardware (EHW) is a new method for designing electronic circuits. However, there are several problems to solve for making high performance systems. One is the limited sca...
Jim Torresen
WCE
2007
15 years 3 months ago
VHDL Implementation of Multiplierless, High Performance DWT Filter Bank
—The JPEG 2000 image coding standard employs the biorthogonal 9/7 wavelet for lossy compression. The performance of hardware implementation of 9/7-filter bank depends on accuracy...
M. M. Aswale, R. B. Patil