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» Dimensionality Reduction for Classification
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ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
14 years 4 months ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...
CIKM
2007
Springer
14 years 3 months ago
Regularized locality preserving indexing via spectral regression
We consider the problem of document indexing and representation. Recently, Locality Preserving Indexing (LPI) was proposed for learning a compact document subspace. Different from...
Deng Cai, Xiaofei He, Wei Vivian Zhang, Jiawei Han
GLVLSI
2006
IEEE
119views VLSI» more  GLVLSI 2006»
14 years 3 months ago
Thermal analysis of a 3D die-stacked high-performance microprocessor
3-dimensional integrated circuit (3D IC) technology places circuit blocks in the vertical dimension in addition to the conventional horizontal plane. Compared to conventional plan...
Kiran Puttaswamy, Gabriel H. Loh
AFRIGRAPH
2006
ACM
14 years 3 months ago
A GPU based saliency map for high-fidelity selective rendering
The computation of high-fidelity images in real-time remains one of the key challenges for computer graphics. Recent work has shown that by understanding the human visual system,...
Peter Longhurst, Kurt Debattista, Alan Chalmers
MM
2005
ACM
171views Multimedia» more  MM 2005»
14 years 3 months ago
Semantic manifold learning for image retrieval
Learning the user’s semantics for CBIR involves two different sources of information: the similarity relations entailed by the content-based features, and the relevance relatio...
Yen-Yu Lin, Tyng-Luh Liu, Hwann-Tzong Chen