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» Dimensionality reduction and generalization
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133
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DAC
2005
ACM
15 years 5 months ago
Total power reduction in CMOS circuits via gate sizing and multiple threshold voltages
Minimizing power consumption is one of the most important objectives in IC design. Resizing gates and assigning different Vt’s are common ways to meet power and timing budgets. ...
Feng Gao, John P. Hayes
125
Voted
ISLPED
2007
ACM
97views Hardware» more  ISLPED 2007»
15 years 5 months ago
Detailed placement for leakage reduction using systematic through-pitch variation
We present a novel detailed placement technique that accounts for systematic through-pitch variations to reduce leakage. Leakage depends nearly exponentially on linewidth (gate le...
Andrew B. Kahng, Swamy Muddu, Puneet Sharma
126
Voted
PAA
2008
15 years 3 months ago
Prototype reduction using an artificial immune model
Artificial immune system (AIS)-based pattern classification approach is relatively new in the field of pattern recognition. The study explores the potentiality of this paradigm in ...
Utpal Garain
130
Voted
TSMC
2002
110views more  TSMC 2002»
15 years 3 months ago
Complexity reduction for "large image" processing
We present a method for sampling feature vectors in large (e.g., 2000 5000 16 bit) images that finds subsets of pixel locations which represent "regions" in the image. Sa...
Nikhil R. Pal, James C. Bezdek
CARTOGRAPHICA
2010
109views more  CARTOGRAPHICA 2010»
15 years 1 months ago
Automated Reduction of Visual Complexity in Small-Scale Relief Shading
Shaded relief derived automatically from digital elevation models differs distinctly from traditional manual shading. Particularly at small scales, many small topographic details ...
Anna M. Leonowicz, Bernhard Jenny, Lorenz Hurni