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113
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ASPDAC
2005
ACM
113views Hardware» more  ASPDAC 2005»
15 years 8 months ago
Scalable interprocedural register allocation for high level synthesis
Abstract— The success of classical high level synthesis has been limited by the complexity of the applications it can handle, typically not large enough to necessitate the depart...
Rami Beidas, Jianwen Zhu
140
Voted
EMSOFT
2006
Springer
15 years 6 months ago
New approach to architectural synthesis: incorporating QoS constraint
Embedded applications like video decoding, video streaming and those in the network domain, typically have a Quality of Service (QoS) requirement which needs to be met. Apart from...
Harsh Dhand, Basant Kumar Dwivedi, M. Balakrishnan
120
Voted
ICTAI
2006
IEEE
15 years 8 months ago
Graph Grammar Induction on Structural Data for Visual Programming
Computer programs that can be expressed in two or more dimensions are typically called visual programs. The underlying theories of visual programming languages involve graph gramm...
Keven Ates, Jacek P. Kukluk, Lawrence B. Holder, D...
118
Voted
ESAW
2009
Springer
15 years 9 months ago
Programming Organization-Aware Agents
Organizational notions such as roles, norms (e.g., obligations and permissions), and services are increasingly viewed as natural concepts to manage the complexity of software devel...
M. Birna van Riemsdijk, Koen V. Hindriks, Catholij...
137
Voted
IMC
2006
ACM
15 years 8 months ago
Measurement based analysis, modeling, and synthesis of the internet delay space
Understanding the characteristics of the Internet delay space (i.e., the all-pairs set of static round-trip propagation delays among edge networks in the Internet) is important fo...
Bo Zhang, T. S. Eugene Ng, Animesh Nandi, Rudolf H...